Laytools.com Home
 
 

Expand All LevelsCollpase All Levels

HomeLayTOOLS ProductsPhysical Design → LAYVER

LayVER - Verification

Overview

LayVER is a sophisticated and comprehensive layout verification package that provides a complete set of tools to validate IC designs of any size and complexity. It offers database layer operations, it provides spacing, intersection, extension, and sizing checks, as well as device and node extraction, and net-list comparison all under the same umbrella. With these features, design rule checks (drc), layout to schematic comparison (lvs), electrical rules checks (erc) and parameter extraction (lpe) can be efficiently performed.

LayVER’s flexibility accommodates very complex design constructs and can adapt to special technology demands. Unlike some traditional verification programs that use fixed device structures, LayVER offers user-definable devices – indeed any unique design structure may be identified and extracted as a device. LayVER supports industry standard database formats and net-list formats such as HSpice, PSpice, or EDIF. With its flexibility and sophisticated algorithms, LayVER delivers unparalleled verification performance.

The powerful LayVER command file language includes such features as jump and branch instructions, allows definition of variables, and, where needed for database massaging (or biasing), can output data in a LayED compatible format. It is complemented by a tool (CaliLay) which allows the import of CalibreTM command files (run-decks).

The traditional drc and lvs functions may be complemented with parasitic parameter extraction (lpe), including track resistance, contact and via resistance, and the various components of parasitic capacitance (area, lateral and fringing terms). The drc and lvs violations are placed in a file which can be overlaid on the LayED data base (using the LayED LVI* feature) for easy graphical identification of any issues flagged.

Basic Features
Imports GDS2, DXF2D, CIF, GERBER (RS-274X) databases
Operates directly on LayED databases (DBX), or on imported database
Technology independent
Operations may be carried out on polygons, paths, edges, or text
Recognizes LayED PGroups
No restrictions on polygon shape or database size
Comprehensive select, combinatorial (logical), and sizing operations
Full set of traditional design rules-checking commands and options
Includes geometric and nodal checking filters
Reads and writes various net-list formats (HSpice, PSpice, EDIF)
Net-list devices may be combined (serial or parallel)
Parameter expressions accepted in net-list
Parameter tolerances may be defined for LVS net-list comparison
Includes antenna check commands
Provides coverage (density) checks, including ‘walking window’ checks for local coverage
Comprehensive graphical evaluation of results using the LVI interface within LayED*
Checks for soft connections
Allows gate-swapping (or 'gate-building' for digital circuits)
Detects and identifies text shorts
 

Advanced Features

Net-list to net-list comparison option (SVS)
Unrestricted user-defined device structures
Handles complex constructs such as asymmetrical contact and via rules.
Device parameter extraction using user-defined expressions
Comprehensive parasitic parameter extraction (LPE)
Extracts vertical, lateral, and fringe capacitance parasitics
Also extracts contact, via, and track resistance.
Allows definition of variables and variable values
Conditional branching at run time according to database contents or defined variable value
All data extracted can be interrogated either within LayVER or graphically using LayED*
* LVI is a module that allows LayED to interface with LayVER
  LayED includes the LVI option as standard
LayED screen example showing on-line DRC and LayVER report file
 
 
LAYVER screen
 
 
Latest Updates (Release 5.6)
 
Further speed optimizations: with special emphasis on ”classical” DRC operations which are now up to three times faster.
The EXIT command of LayVER accepts the new qualifier /DELETE to delete (large) LayVER databases or log files before LayVER finishes its work.
The COMBINE command supports so-called M-factors by the new qualifier /P_MFACTOR[=...].
The /PROPERTY qualifier of DBINIT when used for string-valued properties has been extended to support selection using wildcard strings.
To handle path names in different operating systems with different path separators (“/” for unix-like or “” for mswindows-like) the predefined preprocessor variable “mswindows” can be evaluated which is set only in the case LayVER runs in an MS WindowsTM environment.

 

 
 
 
 
 
 
 
 
 
footer Home footer Software Source footer Products footer LaySIM footer LayMPW footer Support footer PDK footer Downloads footer Services footer Contact Us footer Press footer Privacy Policy footer