|
Home → Products → Physical Design → LAYED LayEDOverview LayED is a powerful all-angles graphics editor especially developed for the layout of complex integrated circuits, including analog, digital, and mixed-signal designs. Impressive features of the layout editor include a rich command set, hierarchically structured databases, very fast redraw speed and screen refresh. Data can be imported or exported in standard exchange formats (including GDS2, Oasis, CIF, GERBER, DXF). This IC layout editor also supports parametric groups (PGroup procedures) and a schematic-driven or net-list-driven layout option to facilitate accurate, efficient, and rapid layout generation. Versions of LayED for both a 'point solution' or a project solution' are maintained.
Basic Features• Data items include polygons, rectangles, lines, paths, circles, arcs, groups, or arrays of groups.
• 256 layers supported fully supported
• 256 data types fully supported • Layer alias names supported
• All-angle, 45-degree, and Manhattan options
• Data may be entered hierarchically (up to 30 levels)
• Supports multiple design windows (customizable window count)
• Full-function edit-in-place
• Data may be accessed from up to 19 reference libraries (in Point Solution Mode) • Reference libraries not required in Project Mode (under LayFRAME) • Data may be imported or exported in various standard formats (GDS2, CIF, GERBER, DXF)
• Optional supervision of imported data to ensure data integrity (vertex count; edge length)
• Flexible command entry – keyboard, hot-key, menu bar, tool bar, layer bar, mouse, command file
• Command procedures, allow access to databases, provide variable definition and subroutines
• Case-sensitive structure names
• Comprehensive data selection criteria for objects and vertices
• Advanced edit features including cut and merge, group creation from selected objects, etc.
• Advanced analysis features (including connectivity highlighting and on-line DRC)
• Accelerated display for large designs
• Supports ports and item properties
• Polygon closure preview Advanced Features • Easily configured for immediate design entry using initialization files
• Network licensing and shared database management
• Layout connectivity through the design hierarchy (evaluated by physical connection)
• Unique bus entry command (with bus as an editable item)
• Command file procedures supported
• Provides schematic-driven layout with LayCIR or SPE (SDLE option)
• On-line DRC (standard)
• Seamless interface to LayVER verification databases to interrogate violations (LVI option)
• Interface to launch LayVER (defines verification window, group name, reference libraries)
• Parametric groups (PGroup procedures) facilitate accurate device generation (SDLE option)
• Parametric interface for Columbus
LayED screen example displaying a list of selected items
|
