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Physical Design

Physical design includes all those operations that are required to create a verified layout database. Thus it includes:

  • mask pattern layout (custom layout)
  • mask pattern layout (automated layout - place and route)
  • layout verification program (design rule checks, lvs, antenna rule checks, electrical rules check, etc.)
  • layout parasitic parameter extraction (often referred to as lpe or RC extraction)
  • utilities for format conversion and check plots

All these physical design facilities are included in the LayTOOLS suite of software, and are closely integrated with those tools used for schematic entry (LayCIR ) and simulation (LaySIM), namely:

  • schematic capture (visual presentation of circuit)
  • schematic net-list (used to verify layout database against schematics, otherwise referred to as lvs)
  • device-level and mixed mode simulation
 
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