Meeting the IC Design Challenge

LayTools Design Suite has been continually improved and enhanced over the last one and a half decades so that it continues to meet the demands of the marketplace head on. LayTools has given the IC Designer the latitude to be creative no matter what the specifications of size and functionality may be. No Limits! Creativity without Bounds! Designer Empowerment!

These remain to be the goals of the LayTools Design Suite. Our Tools complement the IC designer but do not try to replace their innovative skills. Advances in technology will continue to deliver challenges far greater than many of us can imagine, but the LayTools authors commit to addressing the demands as they are presented..

LayTools Suite thus keeps pace with today's design expectations while offering the creative enterprise a design portal of the future.

What is your next big IC development challenge?
Ninety nanometers or below?
An IC with 20 million devices or more?
A complex mixed signal design with many IP blocks?
A challenging analog design on an elaborate technology?

Empower yourself. Take the LayTools Design Suite for a ride. Go to Downloads once you have reviewed the product descriptions.

Latest Company and Software News Eastwell Technologies, Shanghai, is authorized as the exclusive distributor of LayTools in The People's Republic of China LayTools enhances it's conversion tool from Calibre run-decks to LAYVER (Calilay)   LayTools schematic capture (SPE) is available with Verilog and VHDL net-listing LayTools is now compatible with Microsoft VISTA™

Elaine Gao and John Campbell of TexEDA Design Inc, with Michael Xie and Jack Chui of Eastwell Technologies, at the Eastwell offices in Shanghai after the signing of the agreement that authorizes Eastwell as exclusive distributors of LayTools software in the People's Republic of China.